System-on-Chip Design and Emulation
Course Overview:
- Anatomy of a System-on-Chip, and process flow.
- Chip Architecture – concepts, tradeoffs, DOs and DONTs.
- EDA Tools
- Logic Design Concepts
- Verilog Language for Design and Verification
- SoC Design
- SoC Verification
- Synthesis and Static Timing Analysis (STA)
- SoC Emulation
- Chip Front-end Sign-off Checks
- Projects – Design of a digital systems and its implementation on FPGA.
- We Use Cadence tools for all our ASIC training services.
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