Verification using UVM is designed to help engineers transition to the more standardized verification methodology, UVM. This course helps engineers understand the concepts of building a testbench from the ground up using UVM. The goal is to understand the different requirements to effectively stitch the different components to create a re-usable and extendable testbench. Examples with explanations and labs are provided help comprehend the different concepts of UVM.
Course Duration: Two days.
This course requires the engineer to have good understanding of SystemVerilog and also have thorough comprehension of Object Oriented programming within SystemVerilog. It is highly desired that the engineer have worked on at least one Verification project.
Introduction to UVM
- UVM test bench Architecture and Methodology
- UVM Class Hierarchy
- UVM object class
- UVM component class
- UVM Component Phases
- Registering UVM object and component class with UVM factory
- Lab to demonstrate all the UVM classes
UVM test bench environment
- UVM Data items
- UVM drivers and BFM
- UVM Sequencers
- UVM sequences
- UVM Virtual sequences
- UVM Monitor
- UVM scoreboard
- UVM Agent
- UVM environment
- Lab to demonstrate creating an UVM test bench environment
- UVM configuration mechanisms
- Standard configuration fields
- UVM configuration objects
- UVM reporting
- UVM reporting macros
- UVM severity actions for reporting macros
- Redirecting reporting actions to a file
- Using all this in the lab
- Undestanding UVM factory in detail
- Registering the UVM object and component classes with UVM factory
- Transaction level modelling(TLM)
- Using TLM ports for transaction level communications
- TLM export and analysis ports
- Lab to demonstrate TLM
Introduction to UVM register layer
- Introduction to UVM register layer
About Krispan Incorporated
Krispan Incorporated founded in 2006, is an ASIC Consulting and Training company. Krispan provides ASIC engineering services for Architecture, Design, Verification, Physical Design and Firmware. Krispan provides Training services for ASIC Design and Verification, from the basics to Advanced Verification.
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